The on-state (or “on”) resistance of a MOSFET (metal-oxide semiconductor field-effect transistor) device is an important figure of merit, especially for power devices. For example, when such a device is on, or conducting, a portion of the system power is lost due to resistance heating in the device. This leads to deleteriously decreased efficiency. Such resistance heating may also lead to heat dissipation problems, which in turn may lead to system overheating and/or decreased reliability. Consequently, devices with low on resistances are much desired.
The on resistance of a MOSFET (metal-oxide semiconductor field-effect transistor) device comprises mostly resistance of the channel, the drift layer and the substrate components. For low voltage MOSFETs, the channel resistance component provides a dominant contribution. The channel resistance is inversely proportional to the mobility of the carriers in the channel. In Silicon, the mobility of the carriers in the channel depends upon the crystal plane and the direction of current flow and this dependence is different for different types of carriers, e.g., electrons versus holes.
MOSFETs may be fabricated in crystalline Silicon. Geometry related to a crystal lattice is generally described in terms of the Miller index, which references the crystallographic axes of a crystal, e.g., a, b and c. As a crystal is periodic, there exist families of equivalent directions and planes. Herein, a plane, e.g., a surface of a wafer sliced from a crystal ingot, is described enclosed within parenthesis, e.g., (abc). This notation describes the (abc) plane and equivalent planes. Directions relative to the crystal lattice are described enclosed within brackets, e.g., [abc]. This notation describes the [abc] direction and equivalent directions.
The mobility of electrons in Silicon is known to be the maximum in the (100) crystalline plane and is weakly dependent on the direction of the current flow. In contrast, the mobility of holes is a strong function of both the orientation of the crystalline plane and the direction of the current flow. The mobility of the holes is maximum in the (110) crystalline plane and in the [110] direction.
It has been known for quite some time that the mobility of holes in the (110) crystalline plane depends on the direction of current flow being maximum in the [110] direction (D. Colman et al., Journal of Applied Physics, pp. 1923-1931, 1968). Their experimental results are shown in the graph of FIG. 1 (conventional art). From the graph of FIG. 1, it is evident that compared to the conventional (100) orientation, the hole mobilities in the (110) crystalline plane are increased by more than a factor of two, depending upon the gate bias.
Plummer et al. have also reported (1980 IEDM, pp. 104-106) that a trench power MOSFET fabricated on (100) wafers with trench side walls parallel to the (110) crystalline planes do exhibit higher hole mobility at higher gate voltages than corresponding trench MOSFETs with trench walls parallel to the (110) plane but with the direction of current flow being also in the [100] direction.
More recently, various authors have reiterated that the hole mobility is highest in the (110) plane and in the [110] direction (H. Irie et al., IEDM, pp. 225-228, 2004 and references therein). A patent for a trench lateral device has also been granted to Wendell P. Noble et al. (U.S. Pat. No. 6,580,154, issued Jun. 17, 2003).
However, conventional P-channel trench MOSFET devices are fabricated such that the holes flow in an inversion channel which is along the (100) crystalline plane and the direction of the current flow is in the [100] direction.